Location: Hyderabad
Job Type: Full-time
Joining: Immediate Joiner Preferred
Experience Level: 2-7 years preferred

Job Description:

We are seeking a highly motivated Physical Design Engineer to join our VLSI team. The ideal candidate will be responsible for implementing the RTL design to GDSII using industry-standard EDA tools, ensuring optimized performance, power, and area metrics.

Key Responsibilities:

• Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verification.
• Timing closure using STA tools to meet PPA targets.
• Interact with RTL designers and verification teams for design understanding and signoff.
• Handle design constraints (SDC) and run DRC/LVS checks.
• Work with sign-off tools (PrimeTime, RedHawk, Calibre, etc.).

Required Skills:

• Hands-on experience with physical design tools: Cadence Innovus / Synopsys ICC2 / Mentor Olympus.
• Strong understanding of the ASIC design flow.
• Experience in multi-voltage, low-power design techniques.
• Proficient in scripting languages (TCL, Perl, Python).
• Excellent analytical and communication skills.

Education & Experience:

• B.E./B.Tech or M.E./M.Tech in ECE/VLSI/Microelectronics or related field.
• 0–3 years of experience in Physical Design (Freshers with training can also apply).

Why Join Us?

• Opportunity to work on cutting-edge semiconductor designs.
• Friendly and technically strong team environment.
• Exposure to real-time projects and global clients.
• Career growth with mentorship and certification support.

📩 How to Apply:

Submit your updated resume using the Apply Now button or email us at [careers@avecas.in] with the subject line: Application for Physical Design Engineer – Hyderabad.