As semiconductor designs integrate an increasing number of embedded memories and massive logic gates, traditional external testing becomes a bottleneck. Memory Built-In Self-Test (MBIST) and Logic Built-In Self-Test (LBIST) are essential technologies that allow integrated circuits to test themselves. Avecas specializes in implementing robust, high-performance BIST architectures that enable at-speed testing, reduce dependency on expensive Automated Test Equipment (ATE), and ensure long-term reliability for mission-critical applications.
Our services empower your designs with autonomous testing capabilities across the entire product lifecycle.
We implement advanced MBIST controllers to test a wide variety of embedded memories, including SRAM, ROM, and Register Files. Our solutions support complex memory architectures with multiple ports and varying depths, ensuring complete coverage of memory cell arrays, address decoders, and read/write logic. Automated self-test logic eliminates the need for complex external memory patterns.
For safety-critical industries like automotive and aerospace, we implement LBIST to provide periodic “health checks” of the digital logic. By utilizing Pseudo-Random Pattern Generators (PRPG) and Multiple Input Signature Registers (MISR), we enable the chip to verify its own logic gates without external stimulus. On-chip logic verification is vital for ISO 26262 and high-reliability standards.
To improve manufacturing yield, Avecas integrates Built-In Self-Repair (BISR) mechanisms. When a memory fault is detected during the BIST sequence, the controller automatically maps out the defective rows or columns and replaces them with redundant elements. Self-repair capabilities significantly boost effective silicon yield and profitability.
Our BIST implementations are designed to run at the chip’s functional clock speed. This allows for the detection of delay-related defects and AC faults that traditional low-speed scan testing might miss, ensuring that the silicon performs reliably under real-world operating conditions. At-speed BIST identifies subtle timing defects early in the validation phase.
We provide BIST architectures with enhanced diagnostic capabilities. If a failure occurs, our controllers can export detailed error logs, including the failing address and bit position, which accelerates the root-cause analysis and silicon debug process. Detailed diagnostics reduce the time required for silicon characterization.
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Integrated repair logic saves chips that would otherwise be discarded due to minor memory defects.
Your Partner for Self-Testing Silicon Excellence
We support MBIST and LBIST activities using industry-standard tools and proven methodologies to ensure silicon reliability and autonomous test capability.
Automated insertion of high-performance MBIST controllers for embedded SRAM, ROM, and Register Files, supporting complex multi-port memory architectures.
Implementing autonomous logic testing using Pseudo-Random Pattern Generators and Multiple Input Signature Registers for at-speed verification.
Enhancing manufacturing yield through sophisticated Built-In Self-Repair logic that automatically maps and replaces defective memory elements.
Developing robust test frameworks for real-time, in-field silicon health monitoring, essential for automotive ISO 26262 and mission-critical applications.
designing advanced SoCs.
with specialized process needs.
demanding low-power solutions.
requiring safety-critical libraries.
