Every semiconductor design begins with a foundation — libraries and process design kits (PDKs). These essential building blocks bridge the gap between foundry process technologies and EDA tools, enabling engineers to design chips with confidence, accuracy, and scalability.
At Avecas, we specialize in Library & PDK Development services that empower design teams to optimize performance, meet technology node requirements, and accelerate time-to-market. By combining foundry expertise with robust EDA/CAD methodologies, we deliver high-quality libraries and PDKs tailored to your specific design and business needs.
High-density, high-performance, and low-power libraries.
Multi-Vt libraries for advanced power-performance trade-offs.
Support for advanced technology nodes (from 180nm to 3nm).
ESD-protected IO pad libraries.
Analog/mixed-signal blocks (PLL, LDO, ADC/DAC support).
High-speed interface libraries for automotive, IoT, and networking.
SRAM, ROM, and register-file libraries.
Customized memory architectures with power-efficient design.
Compiler-based solutions for scalable memory integration.
DRC, LVS, and parasitic extraction rule decks.
Device models (BSIM, FinFET, SOI, etc.).
Technology files for layout editors, schematic capture, and simulation tools.
Validation across multiple EDA platforms (Cadence, Synopsys, Siemens EDA).
Avecas supports global foundries and fabs across nodes, ensuring libraries and PDKs align with industry-leading processes.
Feel free to email us on below email address, we will be happy to answer your queries.
Tailored for PPA requirements.
Avecas offers turnkey development and validation services, covering everything from cell design to full PDK enablement.
We ensure robust IP development using world-class EDA toolchains and proven methodologies:
designing advanced SoCs.
with specialized process needs.
demanding low-power solutions.
requiring safety-critical libraries.
